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author
Sangho Lee
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use ChaCha20Rng
1 parent 88a3adf commit 7dd954e

3 files changed

Lines changed: 27 additions & 7 deletions

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Cargo.lock

Lines changed: 2 additions & 0 deletions
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litebox_platform_lvbs/Cargo.toml

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@@ -31,6 +31,8 @@ object = { version = "0.36.7", default-features = false, features = ["pe"] }
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digest = { version = "0.10.7", default-features = false }
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aligned-vec = { version = "0.6.4", default-features = false }
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raw-cpuid = "11.6.0"
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rand_chacha = { version = "0.3.1", default-features = false }
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rand_core = { version = "0.6.4", default-features = false }
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zerocopy = { version = "0.8", default-features = false, features = ["derive"] }
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[target.'cfg(target_arch = "x86_64")'.dependencies]

litebox_platform_lvbs/src/host/lvbs_impl.rs

Lines changed: 23 additions & 7 deletions
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@@ -7,6 +7,7 @@ use crate::{
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Errno, HostInterface, arch::ioport::serial_print_string,
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host::per_cpu_variables::with_per_cpu_variables,
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};
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use rand_core::{RngCore, SeedableRng};
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pub type LvbsLinuxKernel = crate::LinuxKernel<HostLvbsInterface>;
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@@ -102,16 +103,31 @@ unsafe impl litebox::platform::ThreadLocalStorageProvider for LvbsLinuxKernel {
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impl litebox::platform::CrngProvider for LvbsLinuxKernel {
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fn fill_bytes_crng(&self, buf: &mut [u8]) {
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// FIXME: generate real random data.
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static RANDOM: spin::mutex::SpinMutex<litebox::utils::rng::FastRng> =
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spin::mutex::SpinMutex::new(litebox::utils::rng::FastRng::new_from_seed(
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core::num::NonZeroU64::new(0x4d595df4d0f33173).unwrap(),
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));
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static RANDOM: spin::mutex::SpinMutex<Option<rand_chacha::ChaCha20Rng>> =
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spin::mutex::SpinMutex::new(None);
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let mut random = RANDOM.lock();
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for b in buf.chunks_mut(8) {
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b.copy_from_slice(&random.next_u64().to_ne_bytes()[..b.len()]);
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random
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.get_or_insert_with(|| rand_chacha::ChaCha20Rng::from_seed(rdrand_seed()))
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.fill_bytes(buf);
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}
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}
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fn rdrand_seed() -> <rand_chacha::ChaCha20Rng as SeedableRng>::Seed {
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let mut seed = <rand_chacha::ChaCha20Rng as SeedableRng>::Seed::default();
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for chunk in seed.chunks_mut(8) {
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let mut word = 0;
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loop {
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// Safety: `RDRAND` is available on the LVBS target CPUs. A false
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// carry flag means random data is temporarily unavailable.
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if unsafe { core::arch::x86_64::_rdrand64_step(&mut word) } == 1 {
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break;
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}
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core::hint::spin_loop();
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}
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chunk.copy_from_slice(&word.to_ne_bytes()[..chunk.len()]);
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}
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seed
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}
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pub struct HostLvbsInterface;

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