16-bit CPU architecture implemented in HDL — ALU, Register, Program Counter, and full Computer chip. Compatible with the Nand2Tetris Hardware Simulator.
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Updated
Mar 9, 2026 - Scilab
16-bit CPU architecture implemented in HDL — ALU, Register, Program Counter, and full Computer chip. Compatible with the Nand2Tetris Hardware Simulator.
Electrical and Mechanical Design - Electrical Installations - Regulations and Standards - Electrical Loads - Cables and Circuits | Electrical Design at ECE NTUA
All reports of Electrical Engineering MultiSim 14
This project uses a Deep Neural Network (DNN) to forecast household appliance energy consumptionn based on the UCI Energy Dataset. The goal is to achieve a low Mean Squared Error (MSE) and capture realistic daily load patterns such as the evening energy peak between 17:00-20:00 when most families return home from work or other engagements.
This repository stores some of the codes developed in the Postgraduate Program in Electrical and Computer Engineering at the Federal University of Ceará (PPGEEC/UFC), on the Sobral Campus.
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